Intelligent Memory IM2G16D2DBBG-25I SDRAM 2 GB Surface, 84-Pin 16 bit FBGA-84 Ball
- RS-artikelnummer:
- 588-596
- Tillv. art.nr:
- IM2G16D2DBBG-25I
- Tillverkare / varumärke:
- Intelligent Memory
Antal (1 enhet)*
200,70 kr
(exkl. moms)
250,88 kr
(inkl. moms)
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Enheter | Per enhet |
|---|---|
| 1 + | 200,70 kr |
*vägledande pris
- RS-artikelnummer:
- 588-596
- Tillv. art.nr:
- IM2G16D2DBBG-25I
- Tillverkare / varumärke:
- Intelligent Memory
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
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Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Intelligent Memory | |
| Memory Size | 2GB | |
| Product Type | SDRAM | |
| Organisation | 256M x 8 | |
| Data Bus Width | 16bit | |
| Maximum Clock Frequency | 533MHz | |
| Maximum Random Access Time | 2.5ns | |
| Mount Type | Surface | |
| Package Type | FBGA-84 Ball | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 84 | |
| Maximum Operating Temperature | 95°C | |
| Width | 8 mm | |
| Standards/Approvals | JEDEC, RoHS | |
| Series | IM2G | |
| Minimum Supply Voltage | 1.7V | |
| Maximum Supply Voltage | 1.9V | |
| Automotive Standard | AEC-Q100 | |
| Välj alla | ||
|---|---|---|
Brand Intelligent Memory | ||
Memory Size 2GB | ||
Product Type SDRAM | ||
Organisation 256M x 8 | ||
Data Bus Width 16bit | ||
Maximum Clock Frequency 533MHz | ||
Maximum Random Access Time 2.5ns | ||
Mount Type Surface | ||
Package Type FBGA-84 Ball | ||
Minimum Operating Temperature -40°C | ||
Pin Count 84 | ||
Maximum Operating Temperature 95°C | ||
Width 8 mm | ||
Standards/Approvals JEDEC, RoHS | ||
Series IM2G | ||
Minimum Supply Voltage 1.7V | ||
Maximum Supply Voltage 1.9V | ||
Automotive Standard AEC-Q100 | ||
The Intelligent Memory DDR DRAM achieves high-speed data transfer rates by employing a chip architecture that prefetches multiple bits and synchronizes the output data to a system clock. It supports system frequencies up to 533 MHz, enabling fast and efficient performance. The design includes internal banks for concurrent operation and utilizes a 4-bit prefetch architecture to boost data throughput.
RoHS compliant
PASR partial array self refresh
Auto refresh and self refresh
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