STMicroelectronics STM32MP23xA/D Mikroprocessor, 16 bit, 64-bitars, ARM V8-M, ARM Cortex, ARM Cortex A35, ARM Cortex
- RS-artikelnummer:
- 482-983
- Tillv. art.nr:
- STM32MP231DAJ3
- Tillverkare / varumärke:
- STMicroelectronics
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- RS-artikelnummer:
- 482-983
- Tillv. art.nr:
- STM32MP231DAJ3
- Tillverkare / varumärke:
- STMicroelectronics
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
Hitta liknande produkter genom att välja ett eller flera attribut.
Välj alla | Attribut | Värde |
|---|---|---|
| Varumärke | STMicroelectronics | |
| Produkttyp | Mikroprocessor | |
| Serie | STM32MP23xA/D | |
| Enhetskärna | ARM Cortex A35, ARM Cortex M33 | |
| Databussbredd | 16bit | |
| Instruktionsuppsättning | 64-bitars, ARM V8-M, ARM Cortex | |
| Maximal klockfrekvens | 1.5GHz | |
| Gränssnittstyp | SPI, USART, UART, SAI, SPDIF, USB, SDM, I2C, FMC, MIPI-DSI, LVDS, CAN, DDR4, LPDDR4, DDR3L, Ethernet | |
| Minsta matningsspänning | 1.71V | |
| Kapseltyp | TFBGA361 | |
| Antal ben | 361 | |
| Maximal matningsspänning | 3.6V | |
| Standarder/godkännanden | JEDEC | |
| Fordonsstandard | Nej | |
| Antal kärnor | 2 | |
| Välj alla | ||
|---|---|---|
Varumärke STMicroelectronics | ||
Produkttyp Mikroprocessor | ||
Serie STM32MP23xA/D | ||
Enhetskärna ARM Cortex A35, ARM Cortex M33 | ||
Databussbredd 16bit | ||
Instruktionsuppsättning 64-bitars, ARM V8-M, ARM Cortex | ||
Maximal klockfrekvens 1.5GHz | ||
Gränssnittstyp SPI, USART, UART, SAI, SPDIF, USB, SDM, I2C, FMC, MIPI-DSI, LVDS, CAN, DDR4, LPDDR4, DDR3L, Ethernet | ||
Minsta matningsspänning 1.71V | ||
Kapseltyp TFBGA361 | ||
Antal ben 361 | ||
Maximal matningsspänning 3.6V | ||
Standarder/godkännanden JEDEC | ||
Fordonsstandard Nej | ||
Antal kärnor 2 | ||
- COO (ursprungsland):
- TW
The STMicroelectronics MPU with Arm Cortex-A35 devices are based on the high-performance single or dual-core Arm Cortex-A35 64-bit RISC core operating at up to 1.5 GHz. The Cortex‑A35 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU, and a 512-Kbyte L2 cache. The Cortex‑A35 processor uses a highly efficient 8 stage in-order pipeline that has been extensively optimized to provide full Armv8-A features while maximizing area and power efficiency.
Four I2Cs
Three I3Cs
Four USARTs and three UARTs
One low power UART
Low power consumption
Clock management
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