Infineon, 32bit ARM Cortex M0, CY8C4100 Microcontroller, 24MHz, 128 kB Flash, 64-Pin TQFP

Mängdrabatt möjlig

Antal (1 fack med 90 enheter)*

4 745,25 kr

(exkl. moms)

5 931,54 kr

(inkl. moms)

Add to Basket
välj eller skriv kvantitet
Tillfälligt slut
  • Leverans från den 15 december 2026
Behöver du mer? Ange den kvantitet du behöver och klicka på "Kontrollera leveransdatum"
Enheter
Per enhet
Per Bricka*
90 - 9052,725 kr4 745,25 kr
180 - 36050,246 kr4 522,14 kr
450 +48,507 kr4 365,63 kr

*vägledande pris

RS-artikelnummer:
176-8942
Tillv. art.nr:
CY8C4127AXI-S445
Tillverkare / varumärke:
Infineon
Hitta liknande produkter genom att välja ett eller flera attribut.
Välj alla

Brand

Infineon

Family Name

CY8C4100

Package Type

TQFP

Mounting Type

Surface Mount

Pin Count

64

Device Core

ARM Cortex M0

Data Bus Width

32bit

Program Memory Size

128 kB

Maximum Frequency

24MHz

RAM Size

16 kB

USB Channels

0

Number of PWM Units

1 x 16 bit

Number of SPI Channels

5

Number of USART Channels

0

Typical Operating Supply Voltage

1.8 → 5.5 V

Number of UART Channels

5

Number of I2C Channels

5

Number of CAN Channels

1

Height

1.45mm

Maximum Operating Temperature

+85 °C

ADCs

2 x 10/12 bit

Length

14.05mm

Pulse Width Modulation

1 (8 x 16 bit)

Dimensions

14.05 x 14.05 x 1.45mm

Width

14.05mm

Number of ADC Units

1

Maximum Number of Ethernet Channels

0

Number of LIN Channels

0

Minimum Operating Temperature

-40 °C

Instruction Set Architecture

Thumb-2

Number of Ethernet Channels

0

Program Memory Type

Flash

Number of PCI Channels

0

PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4200_BL product family, based on this platform, is a combination of a microcontroller with an integrated Bluetooth Low Energy (BLE), also known as Bluetooth Smart, radio and subsystem (BLESS).

Four opamps with reconfigurable high-drive external and high-bandwidth internal drive, Comparator modes, and ADC input buffering capability Can operate in Deep Sleep mode.
Four programmable logic blocks called universal digital blocks, (UDBs), each with eight macrocells and data path
Cypress-provided peripheral component library, user-defined state machines, and Verilog input
Power Management:
Active mode: 1.7 mA at 3-MHz flash program execution
Deep Sleep mode: 1.5 μA with watch crystal oscillator

relaterade länkar