STMicroelectronics STM32U585OIY6QTR, 8 bit ARM Cortex M33, STM32U585xx Microcontroller, 160 MHz, 2MB FLASH, 90-Pin WLCSP

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Förpackningsalternativ:
RS-artikelnummer:
330-361
Tillv. art.nr:
STM32U585OIY6QTR
Tillverkare / varumärke:
STMicroelectronics
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Brand

STMicroelectronics

Series

STM32U585xx

Product Type

Microcontroller

Package Type

WLCSP

Mount Type

Surface

Pin Count

90

Device Core

ARM Cortex M33

Data Bus Width

8bit

Program Memory Size

2MB

Maximum Clock Frequency

160MHz

RAM Size

786kB

Maximum Supply Voltage

3.6V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

125°C

DACs

2 x 12 Bit

Width

3.95 mm

Height

7mm

Analogue Comparators

2

Length

9mm

Standards/Approvals

SESIP3 and PSA Level 3 Certified

Number of Programmable I/Os

136

Minimum Supply Voltage

1.71V

Program Memory Type

FLASH

ADCs

14 Bit ADC 2.5 Msps, 12 Bit ADC 2.5 Msps

Automotive Standard

No

Number of Timers

17

Instruction Set Architecture

Arm Cortex

COO (Country of Origin):
TW
The STMicroelectronics devices belong to an ultra-low-power microcontrollers family (STM32U5 series) based on the high-performance Arm Cortex M33 32-bit RISC core. They operate at a frequency of up to 160 MHz The Cortex M33 core features a single-precision FPU (floating-point unit), that supports all the Arm single-precision data-processing instructions and all the data types. The Cortex-M33 core also implements a full set of DSP (digital signal processing) instructions and a MPU (memory protection unit) that enhances the application security. The devices embed high-speed memories (2 Mbytes of flash memory and 786 Kbytes of SRAM), an FSMC (flexible external memory controller) for static memories (for devices with packages of 90 pins and more), two Octo-SPI flash memory interfaces (at least one Quad-SPI available on all packages) and an extensive range of enhanced I/Os and peripherals connected to three APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.

1.71 V to 3.6 V power supply

Low-power background autonomous mode (LPBAM) autonomous peripherals with DMA, functional down to Stop 2 mode

160 nA Shutdown mode (24 wake-up pins)

210 nA Standby mode (24 wake-up pins)

530 nA Standby mode with RTC

1.9 μA Stop 3 mode with 16-Kbyte SRAM

4.3 μA Stop 3 mode with full SRAM

4.0 μA Stop 2 mode with 16-Kbyte SRAM

8.95 μA Stop 2 mode with full SRAM

19.5 μA/MHz Run mode at the rate 3.3 V

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