Renesas Electronics, Klockbuffert, 40 Ben, VFQFN
- RS-artikelnummer:
- 250-3482
- Tillv. art.nr:
- 8T49N242-999NLGI
- Tillverkare / varumärke:
- Renesas Electronics
Antal (1 fack med 490 enheter)*
31 779,93 kr
(exkl. moms)
39 724,79 kr
(inkl. moms)
Lagerinformation är för närvarande otillgänglig - kom tillbaka senare
Enheter | Per enhet | Per fack* |
|---|---|---|
| 490 + | 64,857 kr | 31 779,93 kr |
*vägledande pris
- RS-artikelnummer:
- 250-3482
- Tillv. art.nr:
- 8T49N242-999NLGI
- Tillverkare / varumärke:
- Renesas Electronics
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
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Välj alla | Attribut | Värde |
|---|---|---|
| Varumärke | Renesas Electronics | |
| Produkttyp | Klockbuffert | |
| Maximal ingångsfrekvens | 875MHz | |
| Typ av fäste | Yta | |
| Kapseltyp | VFQFN | |
| Antal ben | 40 | |
| Minsta matningsspänning | 3.14V | |
| Maximal matningsspänning | 3.47V | |
| Minsta arbetsstemperatur | -40°C | |
| Maximal arbetstemperatur | 85°C | |
| Höjd | 1mm | |
| Serie | 8T49N242 | |
| Längd | 6mm | |
| Standarder/godkännanden | RoHS | |
| Fordonsstandard | Nej | |
| Välj alla | ||
|---|---|---|
Varumärke Renesas Electronics | ||
Produkttyp Klockbuffert | ||
Maximal ingångsfrekvens 875MHz | ||
Typ av fäste Yta | ||
Kapseltyp VFQFN | ||
Antal ben 40 | ||
Minsta matningsspänning 3.14V | ||
Maximal matningsspänning 3.47V | ||
Minsta arbetsstemperatur -40°C | ||
Maximal arbetstemperatur 85°C | ||
Höjd 1mm | ||
Serie 8T49N242 | ||
Längd 6mm | ||
Standarder/godkännanden RoHS | ||
Fordonsstandard Nej | ||
The Renesas Electronics frequency translator has one fractional-feedback PLL that can be used as a jitter attenuator and frequency translator. It is equipped with four integer output dividers, allowing the generation of up to four different output frequencies, ranging from 8kHz to 1GHz. These frequencies are completely independent of the input reference frequencies, and the crystal reference frequency. The outputs may select among LVPECL, LVDS, HCSL or LVCMOS output levels.
It accepts up to two differential or single-ended input clocks and a fundamental-mode crystal input
The internal PLL can lock to either of the input reference clocks or just to the crystal to behave as a frequency synthesizer
The device supports hitless reference switching between input clocks
The device monitors both input clocks for Loss of Signal and generates an alarm when an input clock failure is detected
The PLL has a register-selectable loop bandwidth from 0.2Hz to 6.4kHz
The device is programmable through an I2C interface
It also supports I2C master capability to allow the register configuration to be read from an external EEPROM