853S011BGILF, Clock Buffer, 2-Input, 8-Pin SOIC
- RS-artikelnummer:
- 216-6212
- Tillv. art.nr:
- 853S011BGILF
- Tillverkare / varumärke:
- Renesas Electronics
Mängdrabatt möjlig
Antal (1 förpackning med 2 enheter)*
115,48 kr
(exkl. moms)
144,36 kr
(inkl. moms)
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- 162 enhet(er) är redo att levereras
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Enheter | Per enhet | Per förpackning* |
|---|---|---|
| 2 - 8 | 57,74 kr | 115,48 kr |
| 10 - 18 | 51,97 kr | 103,94 kr |
| 20 - 48 | 50,85 kr | 101,70 kr |
| 50 - 98 | 49,055 kr | 98,11 kr |
| 100 + | 42,45 kr | 84,90 kr |
*vägledande pris
- RS-artikelnummer:
- 216-6212
- Tillv. art.nr:
- 853S011BGILF
- Tillverkare / varumärke:
- Renesas Electronics
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
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Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Renesas Electronics | |
| Logic Function | Clock Buffer | |
| Input Signal Type | LVPECL | |
| Number of Clock Inputs | 2 | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Välj alla | ||
|---|---|---|
Brand Renesas Electronics | ||
Logic Function Clock Buffer | ||
Input Signal Type LVPECL | ||
Number of Clock Inputs 2 | ||
Package Type SOIC | ||
Pin Count 8 | ||
The Renesas Electronics 853S011B is a low skew, high performance 1-to-2 Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The 853S011B is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 853S011B ideal for those clock distribution applications demanding well defined performance and repeatability.
Two differential 2.5V, 3.3V LVPECL/ECL outputs
One differential PCLK, nPCLK input pair
PCLK, nPCLK pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
Maximum output frequency: >2.5GHz
Translates any single-ended input signal to 3.3V LVPECL levels
with resistor bias on nPCLK input
Output skew: 5ps (typical)
Part-to-part skew: 130ps (maximum)
Propagation delay: 355ps (maximum)
One differential PCLK, nPCLK input pair
PCLK, nPCLK pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
Maximum output frequency: >2.5GHz
Translates any single-ended input signal to 3.3V LVPECL levels
with resistor bias on nPCLK input
Output skew: 5ps (typical)
Part-to-part skew: 130ps (maximum)
Propagation delay: 355ps (maximum)