Microchip dsPIC33CK CPU Microprocessor dsPIC33CK256MP508 FAMILY 16 bit CISC 100 MHz 64-Pin TQFP

RS-artikelnummer:: 179-3999P
Tillv. art.nr:: DSPIC33CK256MP506-I/PT
Tillverkare / varumärke:: Microchip

Microchip dsPIC33CK CPU Microprocessor dsPIC33CK256MP508 FAMILY 16 bit CISC 100 MHz 64-Pin TQFP

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RS-artikelnummer:: 179-3999P
Tillv. art.nr:: DSPIC33CK256MP506-I/PT
Tillverkare / varumärke:: Microchip

Specifikationer

Datablad

Lagstiftning och ursprungsland

Produktdetaljer

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Välj alla	Attribut	Värde
	Brand	Microchip
	Series	dsPIC33CK256MP508 FAMILY
	Product Type	Microprocessor
	Device Core	dsPIC33CK CPU
	Data Bus Width	16bit
	Instruction Set Architecture	CISC
	Maximum Clock Frequency	100MHz
	Mount Type	Surface
	Minimum Supply Voltage	3.6V
	Package Type	TQFP
	Pin Count	64
	Maximum Supply Voltage	3.6V
	Minimum Operating Temperature	-40°C
	Maximum Operating Temperature	85°C
	Standards/Approvals	IEC 60730, AEC-Q100 REVG (Grade 1)
	Height	1.2mm
	Width	12 mm
	Length	12mm
	Number of Cores	1
	Automotive Standard	AEC-Q100

	Välj alla
	Brand Microchip
	Series dsPIC33CK256MP508 FAMILY
	Product Type Microprocessor
	Device Core dsPIC33CK CPU
	Data Bus Width 16bit
	Instruction Set Architecture CISC
	Maximum Clock Frequency 100MHz
	Mount Type Surface
	Minimum Supply Voltage 3.6V
	Package Type TQFP
	Pin Count 64
	Maximum Supply Voltage 3.6V
	Minimum Operating Temperature -40°C
	Maximum Operating Temperature 85°C
	Standards/Approvals IEC 60730, AEC-Q100 REVG (Grade 1)
	Height 1.2mm
	Width 12 mm
	Length 12mm
	Number of Cores 1
	Automotive Standard AEC-Q100

Datasheet

COO (Country of Origin):: US

Microchip’s dsPIC33CK family of digital signal controllers (DSCs) features a single 100 MIPS 16-bit dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation and provide extended motor life. They can be used to control BLDC, PMSM, ACIM, SR and stepper motors.

3.0V to 3.6V, -40ºC to +125ºC, DC to 100 MIPS

dsPIC33CK DSC Core:

Modified Harvard architecture with 16-bit data and 24-bit instructions

Code efficient (C and Assembly) CPU architecture designed for real-time applications

16 16-bit working registers

4 sets of interrupt context saving registers, including ACC and CPU status for fast interrupt handling

Single-cycle, mixed-sign 32-bit MUL

Fast 6-cycle hardware 32/16 and 16/16 DIV

Dual 40-bit fixed point Accumulators (ACC) for DSP operations

Single-cycle MAC/MPY with dual data fetch and result write-back

Zero overhead looping support

Microchip dsPIC33CK CPU Microprocessor dsPIC33CK256MP508 FAMILY 16 bit CISC 100 MHz 64-Pin TQFP

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