Texas Instruments, 32 bit ARM Cortex M4F, Hercules TMS570 ARM Cortex-R Microcontroller, 16 MHz, 768kB FLASH, 100-Pin
- RS-artikelnummer:
- 252-0780
- Tillv. art.nr:
- TMS5700714APZQQ1
- Tillverkare / varumärke:
- Texas Instruments
Antal (1 fack med 90 enheter)*
15 249,78 kr
(exkl. moms)
19 062,18 kr
(inkl. moms)
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- Dessutom levereras 450 enhet(er) från den 12 januari 2026
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Enheter | Per enhet | Per Bricka* |
|---|---|---|
| 90 + | 169,442 kr | 15 249,78 kr |
*vägledande pris
- RS-artikelnummer:
- 252-0780
- Tillv. art.nr:
- TMS5700714APZQQ1
- Tillverkare / varumärke:
- Texas Instruments
Specifikationer
Lagstiftning och ursprungsland
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Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Texas Instruments | |
| Product Type | Microcontroller | |
| Series | Hercules TMS570 ARM Cortex-R | |
| Package Type | LQFP (PZ) | |
| Mount Type | Surface | |
| Pin Count | 100 | |
| Device Core | ARM Cortex M4F | |
| Data Bus Width | 32bit | |
| Program Memory Size | 768kB | |
| Maximum Clock Frequency | 16MHz | |
| RAM Size | 128kB | |
| Maximum Supply Voltage | 1.32V | |
| Minimum Operating Temperature | -40°C | |
| Number of Programmable I/Os | 55 | |
| Maximum Operating Temperature | 150°C | |
| Standards/Approvals | RoHS | |
| Minimum Supply Voltage | 1.14V | |
| Automotive Standard | No | |
| ADCs | 12 bit | |
| Program Memory Type | FLASH | |
| Instruction Set Architecture | RISC | |
| Välj alla | ||
|---|---|---|
Brand Texas Instruments | ||
Product Type Microcontroller | ||
Series Hercules TMS570 ARM Cortex-R | ||
Package Type LQFP (PZ) | ||
Mount Type Surface | ||
Pin Count 100 | ||
Device Core ARM Cortex M4F | ||
Data Bus Width 32bit | ||
Program Memory Size 768kB | ||
Maximum Clock Frequency 16MHz | ||
RAM Size 128kB | ||
Maximum Supply Voltage 1.32V | ||
Minimum Operating Temperature -40°C | ||
Number of Programmable I/Os 55 | ||
Maximum Operating Temperature 150°C | ||
Standards/Approvals RoHS | ||
Minimum Supply Voltage 1.14V | ||
Automotive Standard No | ||
ADCs 12 bit | ||
Program Memory Type FLASH | ||
Instruction Set Architecture RISC | ||
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