Microchip PIC18F45Q10-E/MPVAO, 8 bit 8 Bit MCU, PIC18F26/45/46Q10 8 Bit Microcontroller, 64 MHz, 32kB FLASH, 40-Pin QFN
- RS-artikelnummer:
- 631-511
- Tillv. art.nr:
- PIC18F45Q10-E/MPVAO
- Tillverkare / varumärke:
- Microchip
Antal (1 låda med 511 enheter)*
8 190,819 kr
(exkl. moms)
10 238,396 kr
(inkl. moms)
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- Leverans från den 05 februari 2026
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Enheter | Per enhet | Per Låda* |
|---|---|---|
| 511 + | 16,029 kr | 8 190,82 kr |
*vägledande pris
- RS-artikelnummer:
- 631-511
- Tillv. art.nr:
- PIC18F45Q10-E/MPVAO
- Tillverkare / varumärke:
- Microchip
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
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Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Microchip | |
| Family Name | PIC18F45Q10 | |
| Package Type | QFN | |
| Mounting Type | Surface Mount | |
| Pin Count | 40 | |
| Device Core | 8 bit MCU | |
| Data Bus Width | 8bit | |
| Program Memory Size | 32 kb | |
| Maximum Frequency | 64MHz | |
| Program Memory Type | Flash | |
| Välj alla | ||
|---|---|---|
Brand Microchip | ||
Family Name PIC18F45Q10 | ||
Package Type QFN | ||
Mounting Type Surface Mount | ||
Pin Count 40 | ||
Device Core 8 bit MCU | ||
Data Bus Width 8bit | ||
Program Memory Size 32 kb | ||
Maximum Frequency 64MHz | ||
Program Memory Type Flash | ||
- COO (Country of Origin):
- TH
The Microchip Microcontrollers feature analogue, core independent, and communication peripherals for a wide range of general purpose and low-power applications. These microcontroller devices are equipped with a 10-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold comparisons. They also offer a set of core independent peripherals such as Complementary Waveform Generator (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect (ZCD), Configurable Logic Cell (CLC), and Peripheral Pin Select (PPS), providing increased design flexibility and lower system cost.
C Compiler optimized RISC architecture
Programmable 2 level interrupt priority
31 level deep hardware stack
Three 8 bit timers with hardware limit timer
Four 16 bit timers
Low current power on reset
Power up timer
Brown out reset
Low power BOR option
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