Nexperia 74HC273D,653 8-Bit Latch, Addressable, D Type Flip-Flop, 20-Pin SO
- RS-artikelnummer:
- 170-7978
- Tillv. art.nr:
- 74HC273D,653
- Tillverkare / varumärke:
- Nexperia
Antal (1 rulle med 2000 enheter)*
5 752,00 kr
(exkl. moms)
7 190,00 kr
(inkl. moms)
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- Leverans från den 11 augusti 2026
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Enheter | Per enhet | Per rulle* |
|---|---|---|
| 2000 + | 2,876 kr | 5 752,00 kr |
*vägledande pris
- RS-artikelnummer:
- 170-7978
- Tillv. art.nr:
- 74HC273D,653
- Tillverkare / varumärke:
- Nexperia
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
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Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Nexperia | |
| Product Type | Latch | |
| Logic Family | 74HC | |
| Logic Function | D Type | |
| Latch Mode | Addressable | |
| Number of Bits | 8 | |
| Output Type | D Type Flip-Flop | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | SO | |
| Minimum Supply Voltage | 2V | |
| Pin Count | 20 | |
| Maximum Supply Voltage | 6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Series | 74HC | |
| Standards/Approvals | No | |
| Length | 13mm | |
| Width | 7.6 mm | |
| Height | 2.45mm | |
| Automotive Standard | No | |
| Välj alla | ||
|---|---|---|
Brand Nexperia | ||
Product Type Latch | ||
Logic Family 74HC | ||
Logic Function D Type | ||
Latch Mode Addressable | ||
Number of Bits 8 | ||
Output Type D Type Flip-Flop | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type SO | ||
Minimum Supply Voltage 2V | ||
Pin Count 20 | ||
Maximum Supply Voltage 6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Series 74HC | ||
Standards/Approvals No | ||
Length 13mm | ||
Width 7.6 mm | ||
Height 2.45mm | ||
Automotive Standard No | ||
The 74HC273, 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Key applications
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems
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