Infineon NOR 64Mbit SPI Flash Memory 8-Pin SOIC, S25FL064LABMFI013
- RS-artikelnummer:
- 215-5782
- Tillv. art.nr:
- S25FL064LABMFI013
- Tillverkare / varumärke:
- Infineon
Antal (1 rör med 2100 enheter)*
25 116,00 kr
(exkl. moms)
31 395,00 kr
(inkl. moms)
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Enheter | Per enhet | Per Rør* |
|---|---|---|
| 2100 + | 11,96 kr | 25 116,00 kr |
*vägledande pris
- RS-artikelnummer:
- 215-5782
- Tillv. art.nr:
- S25FL064LABMFI013
- Tillverkare / varumärke:
- Infineon
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
Hitta liknande produkter genom att välja ett eller flera attribut.
Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Infineon | |
| Memory Size | 64Mbit | |
| Interface Type | SPI | |
| Package Type | SOIC | |
| Pin Count | 8 | |
| Organisation | 8 M x 8 | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 2.7 V | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Block Organisation | Symmetrical | |
| Length | 5.28mm | |
| Height | 1.9mm | |
| Width | 5.28mm | |
| Dimensions | 5.28 x 5.28 x 1.9mm | |
| Number of Words | 8MB | |
| Minimum Operating Temperature | -40 °C | |
| Number of Bits per Word | 8bit | |
| Maximum Random Access Time | 8ns | |
| Automotive Standard | AEC-Q100 | |
| Maximum Operating Temperature | +85 °C | |
| Series | S25FL | |
| Välj alla | ||
|---|---|---|
Brand Infineon | ||
Memory Size 64Mbit | ||
Interface Type SPI | ||
Package Type SOIC | ||
Pin Count 8 | ||
Organisation 8 M x 8 | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 2.7 V | ||
Maximum Operating Supply Voltage 3.6 V | ||
Block Organisation Symmetrical | ||
Length 5.28mm | ||
Height 1.9mm | ||
Width 5.28mm | ||
Dimensions 5.28 x 5.28 x 1.9mm | ||
Number of Words 8MB | ||
Minimum Operating Temperature -40 °C | ||
Number of Bits per Word 8bit | ||
Maximum Random Access Time 8ns | ||
Automotive Standard AEC-Q100 | ||
Maximum Operating Temperature +85 °C | ||
Series S25FL | ||
The Cypress Semiconductor FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO), and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock.
Serial Peripheral Interface (SPI) with Multi-I/O
Read
Program Architecture
Erase Architecture
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
Read
Program Architecture
Erase Architecture
100,000 Program-Erase Cycles, minimum
20 Year Data Retention, minimum
Security Features
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