Infineon NOR 128Mbit SPI Flash Memory 24-Pin BGA, S25FL128LAGBHV020
- RS-artikelnummer:
- 181-8362P
- Tillv. art.nr:
- S25FL128LAGBHV020
- Tillverkare / varumärke:
- Infineon
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- RS-artikelnummer:
- 181-8362P
- Tillv. art.nr:
- S25FL128LAGBHV020
- Tillverkare / varumärke:
- Infineon
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Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Infineon | |
| Memory Size | 128Mbit | |
| Interface Type | SPI | |
| Package Type | BGA | |
| Pin Count | 24 | |
| Organisation | 16M x 8 bit | |
| Mounting Type | Surface Mount | |
| Cell Type | NOR | |
| Minimum Operating Supply Voltage | 2.7 V | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Block Organisation | Symmetrical | |
| Length | 8mm | |
| Height | 1.2mm | |
| Width | 6mm | |
| Dimensions | 8 x 6 x 1.2mm | |
| Minimum Operating Temperature | -40 °C | |
| Maximum Random Access Time | 8ns | |
| Series | S25FL | |
| Number of Words | 16M | |
| Automotive Standard | AEC-Q100 | |
| Maximum Operating Temperature | +105 °C | |
| Number of Bits per Word | 8bit | |
| Välj alla | ||
|---|---|---|
Brand Infineon | ||
Memory Size 128Mbit | ||
Interface Type SPI | ||
Package Type BGA | ||
Pin Count 24 | ||
Organisation 16M x 8 bit | ||
Mounting Type Surface Mount | ||
Cell Type NOR | ||
Minimum Operating Supply Voltage 2.7 V | ||
Maximum Operating Supply Voltage 3.6 V | ||
Block Organisation Symmetrical | ||
Length 8mm | ||
Height 1.2mm | ||
Width 6mm | ||
Dimensions 8 x 6 x 1.2mm | ||
Minimum Operating Temperature -40 °C | ||
Maximum Random Access Time 8ns | ||
Series S25FL | ||
Number of Words 16M | ||
Automotive Standard AEC-Q100 | ||
Maximum Operating Temperature +105 °C | ||
Number of Bits per Word 8bit | ||
The FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output(Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO) and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The architecture features a Page Programming Buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase.By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can matchor exceed traditional parallel interface, asynchronous, NOR Flash memories, while reducing signal count dramatically. The FL-L family products offer high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. Provides an ideal storage solution for systems with limited space, signal connections, and power. These memories offer flexibility and performance well beyond ordinary serial flash devices. They are ideal for code shadowing to RAM, executing code directly (XIP), and storing re-programmable data
