Renesas Electronics 9FGV0641AKILF Clock Buffer 40-Pin VFQFPN
- RS-artikelnummer:
- 250-3499P
- Tillv. art.nr:
- 9FGV0641AKILF
- Tillverkare / varumärke:
- Renesas Electronics
Antal 2 enheter (levereras på en bricka)*
42,11 kr
(exkl. moms)
52,638 kr
(inkl. moms)
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- Dessutom levereras 490 enhet(er) från den 30 december 2025
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Enheter | Per enhet |
|---|---|
| 2 + | 21,055 kr |
*vägledande pris
- RS-artikelnummer:
- 250-3499P
- Tillv. art.nr:
- 9FGV0641AKILF
- Tillverkare / varumärke:
- Renesas Electronics
Specifikationer
Datablad
Lagstiftning och ursprungsland
Produktdetaljer
Hitta liknande produkter genom att välja ett eller flera attribut.
Välj alla | Attribut | Värde |
|---|---|---|
| Brand | Renesas Electronics | |
| Maximum Supply Current | 30 mA | |
| Maximum Input Frequency | 27MHz | |
| Mounting Type | Surface Mount | |
| Package Type | VFQFPN | |
| Pin Count | 40 | |
| Välj alla | ||
|---|---|---|
Brand Renesas Electronics | ||
Maximum Supply Current 30 mA | ||
Maximum Input Frequency 27MHz | ||
Mounting Type Surface Mount | ||
Package Type VFQFPN | ||
Pin Count 40 | ||
The Renesas Electronics clock generator is a member of IDT's SOC-Friendly 1.8V very low-power PCIe clock family. The device has integrated 100ohm output terminations providing direction connection to 100ohm transmission lines. The device also has 6 output enables for clock management and supports 2 different spread spectrum levels in addition to spread off.
LP-HCSL outputs with integrated terminations saves 24 resistors compared to standard PCIe devices
54mW typical power consumption which reduces thermal concerns
Outputs can optionally be supplied from any voltage between 1.05V and 1.8V for maximum power savings
Programmable slew rate for each output that allows tuning for various line lengths
Programmable output amplitude allows tuning for various application environments
DIF outputs blocked until PLL is locked for clean system start-up
External 25MHz crystal which supports tight ppm with 0 ppm synthesis error
3.3V tolerant SMBus interface works with legacy controllers
Selectable SMBus addresses as multiple devices can easily share an SMBus segment
Space saving 5 x 5 mm 40-VFQFPN for minimal board space
54mW typical power consumption which reduces thermal concerns
Outputs can optionally be supplied from any voltage between 1.05V and 1.8V for maximum power savings
Programmable slew rate for each output that allows tuning for various line lengths
Programmable output amplitude allows tuning for various application environments
DIF outputs blocked until PLL is locked for clean system start-up
External 25MHz crystal which supports tight ppm with 0 ppm synthesis error
3.3V tolerant SMBus interface works with legacy controllers
Selectable SMBus addresses as multiple devices can easily share an SMBus segment
Space saving 5 x 5 mm 40-VFQFPN for minimal board space
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