8P34S1204NLGI, Clock Buffer LVDS, 4-Input, 16-Pin VFQFN

The Renesas Electronics IDT8P34S1204I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8P34S1204I is characterized to operate from a 1.8V power supply. Guaranteed low output-to-output and part-to-part skew characteristics make the IDT8P34S1204I ideal for those clock distribution applications demanding well-defined performance and repeatability.

Four low skew, low additive jitter LVDS output pairs
Two selectable, differential clock input pairs
Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML
Maximum input clock frequency: 1.2GHz
LVCMOS/LVTTL interface levels for the control input select
Output skew: 10ps (typical)
Propagation delay: 400ps (maximum)